Generating SFI5 signals for the parallel wide PRBS
But wait, We need this to hook up to SFI5 which requires an additional deskew channel. No problem. We need to ship out 8 bytes, of each channel followed by a frame marker and an expansion header. This module wraps the tx_prbs and adds the deskew.
module sfi5_tx ( // Outputs o_ch_0, o_ch_1, o_ch_2, o_ch_3, o_ch_4, o_ch_5, o_ch_6, o_ch_7, o_ch_8, o_ch_9, o_ch_a, o_ch_b, o_ch_c, o_ch_d, o_ch_e, o_ch_f, o_ch_deskew, deskew, // Inputs i_clk_in, i_reset, prbs_select ); input i_clk_in; input i_reset; input [1:0] prbs_select; output [7:0] o_ch_0; output [7:0] o_ch_1; output [7:0] o_ch_2; output [7:0] o_ch_3; output [7:0] o_ch_4; output [7:0] o_ch_5; output [7:0] o_ch_6; output [7:0] o_ch_7; output [7:0] o_ch_8; output [7:0] o_ch_9; output [7:0] o_ch_a; output [7:0] o_ch_b; output [7:0] o_ch_c; output [7:0] o_ch_d; output [7:0] o_ch_e; output [7:0] o_ch_f; output [7:0] o_ch_deskew; output deskew; reg reset; reg [7:0] o_ch_0; reg [7:0] o_ch_1; reg [7:0] o_ch_2; reg [7:0] o_ch_3; reg [7:0] o_ch_4; reg [7:0] o_ch_5; reg [7:0] o_ch_6; reg [7:0] o_ch_7; reg [7:0] o_ch_8; reg [7:0] o_ch_9; reg [7:0] o_ch_a; reg [7:0] o_ch_b; reg [7:0] o_ch_c; reg [7:0] o_ch_d; reg [7:0] o_ch_e; reg [7:0] o_ch_f; reg [7:0] o_ch_deskew; reg [7:0] channel_0; reg [7:0] channel_1; reg [7:0] channel_2; reg [7:0] channel_3; reg [7:0] channel_4; reg [7:0] channel_5; reg [7:0] channel_6; reg [7:0] channel_7; reg [7:0] channel_8; reg [7:0] channel_9; reg [7:0] channel_a; reg [7:0] channel_b; reg [7:0] channel_c; reg [7:0] channel_d; reg [7:0] channel_e; reg [7:0] channel_f; reg [7:0] channel_deskew; reg [7:0] deskew_counter; wire [7:0] prbs_0, prbs_1, prbs_2, prbs_3, prbs_4, prbs_5, prbs_6, prbs_7, prbs_8, prbs_9, prbs_a, prbs_b, prbs_c, prbs_d, prbs_e, prbs_f; reg deskew, deskew_int; tx_prbs tx_prbs_1 ( // Outputs .o_prbs_data_f (prbs_f), // Templated .o_prbs_data_e (prbs_e), // Templated .o_prbs_data_d (prbs_d), // Templated .o_prbs_data_c (prbs_c), // Templated .o_prbs_data_b (prbs_b), // Templated .o_prbs_data_a (prbs_a), // Templated .o_prbs_data_9 (prbs_9), // Templated .o_prbs_data_8 (prbs_8), // Templated .o_prbs_data_7 (prbs_7), // Templated .o_prbs_data_6 (prbs_6), // Templated .o_prbs_data_5 (prbs_5), // Templated .o_prbs_data_4 (prbs_4), // Templated .o_prbs_data_3 (prbs_3), // Templated .o_prbs_data_2 (prbs_2), // Templated .o_prbs_data_1 (prbs_1), // Templated .o_prbs_data_0 (prbs_0), // Templated // Inputs .i_clk (i_clk_in), // Templated .i_reset (reset), // Templated .prbs_select (prbs_select[1:0])); always @ (posedge i_clk_in) begin reset <= i_reset; if (reset) deskew_counter <= 0; //for sim only else deskew_counter <= (deskew_counter == 'h87) ? 0 : deskew_counter + 1; //deskew_counter_p1 <= deskew_counter; deskew_int <= (deskew_counter[7:4] == 'h7); deskew <= deskew_int; channel_0 <= prbs_0; channel_1 <= prbs_1; channel_2 <= prbs_2; channel_3 <= prbs_3; channel_4 <= prbs_4; channel_5 <= prbs_5; channel_6 <= prbs_6; channel_7 <= prbs_7; channel_8 <= prbs_8; channel_9 <= prbs_9; channel_a <= prbs_a; channel_b <= prbs_b; channel_c <= prbs_c; channel_d <= prbs_d; channel_e <= prbs_e; channel_f <= prbs_f; case (deskew_counter) 'h00,'h01,'h02,'h03,'h04,'h05,'h06,'h07: channel_deskew <= prbs_f; 'h08,'h09,'h0a,'h0b,'h0c,'h0d,'h0e,'h0f: channel_deskew <= prbs_e; 'h10,'h11,'h12,'h13,'h14,'h15,'h16,'h17: channel_deskew <= prbs_d; 'h18,'h19,'h1a,'h1b,'h1c,'h1d,'h1e,'h1f: channel_deskew <= prbs_c; 'h20,'h21,'h22,'h23,'h24,'h25,'h26,'h27: channel_deskew <= prbs_b; 'h28,'h29,'h2a,'h2b,'h2c,'h2d,'h2e,'h2f: channel_deskew <= prbs_a; 'h30,'h31,'h32,'h33,'h34,'h35,'h36,'h37: channel_deskew <= prbs_9; 'h38,'h39,'h3a,'h3b,'h3c,'h3d,'h3e,'h3f: channel_deskew <= prbs_8; 'h40,'h41,'h42,'h43,'h44,'h45,'h46,'h47: channel_deskew <= prbs_7; 'h48,'h49,'h4a,'h4b,'h4c,'h4d,'h4e,'h4f: channel_deskew <= prbs_6; 'h50,'h51,'h52,'h53,'h54,'h55,'h56,'h57: channel_deskew <= prbs_5; 'h58,'h59,'h5a,'h5b,'h5c,'h5d,'h5e,'h5f: channel_deskew <= prbs_4; 'h60,'h61,'h62,'h63,'h64,'h65,'h66,'h67: channel_deskew <= prbs_3; 'h68,'h69,'h6a,'h6b,'h6c,'h6d,'h6e,'h6f: channel_deskew <= prbs_2; 'h70,'h71,'h72,'h73,'h74,'h75,'h76,'h77: channel_deskew <= prbs_1; 'h78,'h79,'h7a,'h7b,'h7c,'h7d,'h7e,'h7f: channel_deskew <= prbs_0; 'h80,'h81: channel_deskew <= 8'hf6; //A1 'h82,'h83: channel_deskew <= 8'h28; //A2 'h84,'h85,'h86,'h87: channel_deskew <= 8'haa; //EH default: channel_deskew <= 8'hxx; endcase // case(deskew_counter) o_ch_0 <= channel_0; o_ch_1 <= channel_1; o_ch_2 <= channel_2; o_ch_3 <= channel_3; o_ch_4 <= channel_4; o_ch_5 <= channel_5; o_ch_6 <= channel_6; o_ch_7 <= channel_7; o_ch_8 <= channel_8; o_ch_9 <= channel_9; o_ch_a <= channel_a; o_ch_b <= channel_b; o_ch_c <= channel_c; o_ch_d <= channel_d; o_ch_e <= channel_e; o_ch_f <= channel_f; o_ch_deskew <= channel_deskew; end endmodule // sfi5_tx
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